Flat panel displays such as liquid crystal displays, plasma displays, OLED (organic light-emitting diode) displays and the like, due to their advantages of high quality, small volume, light weight, wide range of applications and the like, are widely used in consumer electronics such as mobile phones, notebook computers, displays, televisions and the like, and have gradually been replacing traditional cathode ray tube displays and become the mainstream of the displays.
As shown in FIG. 1, in a driving structure for a traditional display panel such as a liquid crystal panel, a timing control (T-CON) chip supplies signals such as data signal (DATA), clock signal (CLK), load signal (LOAD), polarity signal (POL) and the like to a source driving chip so as to generate charging signals applied to data lines connected to thin film transistors (TFTs), and supplies start pulse vertical signal (STV), clock pulse vertical signal (CPV) and output enable signal (OE) to a gate driving chip so as to control ON and OFF of the TFTs in respective pixel circuits. An internal structure of the gate driving chip is as shown in FIG. 2, a logic circuit, according to the start pulse vertical signals (STVs, such as STV1 and STV2), the clock pulse vertical signal (CPV), the output enable signal (OE), left or right shift indicating signal (L/R) and the like, controls a shift register to sequentially output gating signals for the gate lines, and the output signals of the shift register are output to the gate lines (G1, G2, . . . Gn) row by row via an output buffer after being enhanced by a level shift module (integrated in the gate driving chip in a form of an IC), thus sequentially gating/scanning the gate lines.
GOA (Gate On Array, a gate driver integrated on an array substrate) technique is one of the gate driving techniques for display panels (e.g., liquid crystal panels), and basic concept thereof is that a gate driving circuit of a liquid crystal panel is integrated on an array substrate to scan and drive the liquid crystal panel. Compared to a conventional driving technique, the GOA technique not only omits a bonding area for the gate driving circuit and a fan-out wiring space, but also achieves a narrow frame design, thus an artistic design symmetrical on both sides can be implemented. FIG. 3 illustrates a gate driving structure of a GOA in the prior art. In this solution, since a level shift module is designed to be inside a source driving chip (i.e. is integrated in the source driving chip in a form of an IC module rather than a TFT structure), it is necessary for the source driving chip to adopt a high voltage manufacturing process; in addition, the T-CON chip is integrated into the same chip as the source driving chip (i.e., the T-CON chip and the source driving chip are the same chip), and comprises a timing circuit for the gate driving circuit, which also makes it necessary to adopt a high voltage manufacturing process for the source driving chip, thus resulting in increased design cost. In addition, limited by the manufacturing process of the chip, |VGH|+|VGL| in source driving signals cannot be too high, and accordingly, a voltage for turning on a TFT output to a GOA unit is relatively low, which results in a problem that the GOA unit cannot be fully turned on or cannot even be started at a low temperature, and further leads to insufficient charging or even a failure to charge. In addition, in the prior art, there is also a GOA driving structure adopting an external level shift chip. In this structure, since signals, such as STV, CLKn and the like, output to the GOA by the external level shift module are of relatively high levels and relatively high frequencies, an anti-electromagnetic interference device cannot be provided between the level shift module and the panel, thus the risk of electromagnetic interference is extremely high, and this design may also result in increased design cost for a panel manufacturer.